The present invention relates to a semiconductor wafer.
Conventionally, the photographic engraving process used for fabrication of integrated circuits is performed, for example, in the following manner: A semiconductor wafer, or substrate, is coated with photoresists; a mask having a predetermined pattern is disposed on the photoresist coated wafer; that wafer is finally irradiated by ultraviolet light, through the mask.
A conventional wafer used for forming integrated circuits thereon has a planar surface. When a mask is disposed on such a planar surface in the photographic engraving process, there is no path to permit the atmosphere confined between the planar surface and the mask to escape, so that it is impossible to rapidly disposed the mask on the wafer. Additionally, when ultraviolet light is focused onto the wafer through the mask, the photoresist emits gases. However, such a wafer construction provides no path for the gas to escape. Thus, the gas is confined between the mask and the wafer so that the mask possibly floats from the wafer. The result of this is that the irradiation area of ultraviolet light through the mask holes is extended and thus the regions of the wafer to be removed are removed imprecisely. Further, in the conventional case, the mask comes in intimate contact with the wafer. Accordingly, when dust or foreign materials are attached to the wafer, the mask and the photoresist coated on the wafer are injured with the result that the integrated circuits obtained are defective. These problems become very serious in the case of large scale integration requiring a high precision in size.